Edocti
Advanced Technical Training for the Software Engineer of Tomorrow
Edocti Training

Embedded Software Architecture & Design

Advanced
21 h
4.6 (53 reviews)

Scheduled sessions

No sessions are available at the moment.
Embedded Software Architecture & Design

Embedded software architecture: Learn a rigorous process to design reliable, modular, and highly scalable embedded systems.

Get hands-on experience designing layered architectures, structuring components, and creating effective UML models.

Apply modern C++ practices to solve complex embedded hardware constraints and real-time system challenges.

Gain practical experience through intensive labs (~70% of the course) focused on building embedded architectural designs from scratch.

How this helps: Significantly improve the long-term maintainability, testability, and runtime performance of your embedded software.

Who it’s for: Designed for software engineers with C/C++ experience working in mission-critical embedded projects.

The course includes optional deep dives into advanced design patterns, ISO 26262 safety alignment, and crucial architecture trade-offs.

Skills You Will Learn

Embedded Architecture UML Modeling Component Design Real-Time Systems Embedded C++ Patterns Hardware Abstraction MISRA & Static Analysis ISO 26262 Basics

Curriculum

Day 1 — From requirements to architecture (embedded realities)

  • Problem framing and stakeholders; quality attributes (safety, performance, availability, energy)
  • Requirements capture and traceability (use cases, non‑functionals, interface contracts)
  • Context, hardware constraints, memory/CPU/energy budgets; early risks and ADRs
  • Architecture views: context, containers/components, deployment; mapping to target

Day 1 — Structural modeling for embedded systems

  • UML with Enterprise Architect: packages, components, deployment and class diagrams
  • Layers and boundaries: application, services, drivers; HAL/SAL patterns; portability seams
  • Dataflow and concurrency model (event‑driven vs time‑triggered; task graph)
  • Interfaces and contracts: APIs, error codes, pre/postconditions

Day 2 — Behavior, timing and real‑time design

  • State machines done right (hierarchy, Mealy/Moore, mode management, reentrancy)
  • Sequence/activity/time diagrams for message flow and timing budgets
  • Scheduling: periodic/sporadic tasks, rate‑monotonic vs. EDF, cooperative vs. preemptive
  • Priority inversion and ceilings; partitioning across cores; estimating WCET

Day 2 — Embedded C/C++ design techniques

  • Resource ownership and RAII; smart pointers vs. static storage; pimpl and interfaces
  • Static vs dynamic polymorphism; CRTP; constexpr and configuration at compile time
  • Fixed‑point math; memory pools, ring buffers and zero‑copy pipelines
  • ISR‑safe code and DMA patterns; volatile, atomics, alignment and endianness

Day 3 — Hardware access, portability and startup

  • Memory‑mapped I/O and register access patterns; bitfields and masks safely
  • Drivers vs. services; CMSIS‑style headers; device trees (overview where relevant)
  • Boot sequence and initialization; secure boot basics; linker script essentials (overview)

Day 3 — Reliability, diagnostics and testing

  • Error handling strategies; watchdogs and brown‑out; graceful degradation
  • Logging/tracing; event logs and performance counters; telemetry hooks
  • Static analysis and MISRA C/C++; unit/integration tests; SIL/HIL and fault injection

Day 3 — From model to code skeleton

  • Map model to modules and folders; dependency rules; public vs private headers
  • Build system (CMake) and toolchain integration; feature flags and variants
  • Generate an application skeleton; wire first use case and CI smoke tests

Optional modules

Optional — Safety & security accents

  • ISO 26262 alignment (ASIL thinking, safety mechanisms) — overview
  • Secure communications and secure flashing basics; hardening checklist

Course Day Structure

  • Part 1: 09:00–10:30
  • Break: 10:30–10:45
  • Part 2: 10:45–12:15
  • Lunch break: 12:15–13:15
  • Part 3: 13:15–15:15
  • Break: 15:15–15:30
  • Part 4: 15:30–17:30

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